Documentation Organization

Our documentation is layered from the general to the specific. Each layer is introduced by one or more "briefs." To the right of the introductory briefs, you will find links to additional briefs, white papers, application notes, tutorials, and other documents that provide more detail and supporting information for that topic.

The top level documentation is Common Architecture, which includes information generally applicable to our entire line of chips. Next is material specific to each of our basic computer and I/O technologies, along with documentation for each chip based on that design.

Common Architecture

Read this first — it explains the technical foundations of our entire family of chips, the advantages of using them as designed, and other general information applicable to all our products.

Architecture

Energy Management

Energy Tutorial Defines terms, discusses the technical methods we use to conserve energy, links to a demonstration of the measurable cost of a single minimal inverter using actual layout and simulation. A work in progress.

GA_Energy_Conservation In this paper we will examine the ways in which the GreenArray chips minimize energy consumption for tasks ranging from high speed parallel processing to execution of large bodies of code written in high-level languages such as C, using examples of the manifold execution models that may be supported by the GreenArray chips.

Comparison of GA chips with Texas Instruments® MSP430 This paper compares the energy consumption of our chips with that of a chip family that is considered to be a micropowered controller suitable for use in energy harvesting systems.

Additional Papers

GA_ADC_Noise_Immunity This note briefly addresses inherent noise amelioration in the current Analog to Digital Converter and explains why external, analog antialiasing filters may be unnecessary in your application.

Boot Protocols Documents the several boot protocols defined for GreenArrays chips.

colorForth instruction set is a "living" discussion of the instruction set defined for GreenArrays chips.

arrayForth™ Development Software including Simulator

arrayForth is a complete, interactive software development and debugging environment for GreenArrays Chips. It includes assembler/compiler, example source code including all ROM on each chip, a full software-level simulator for each chip, and an Interactive Development Environment for use with real chips. The latest release is configured by default for the EVB001 Evaluation Board, for which Virtual Machine support and other tools are included. Follow this link to arrayForth Software Support for documentation and for fully functional downloadable software provided free of charge.

F18A Technology

Read this section for details about the F18A technology on which chips currently in production are based. The Technology Reference book contains the information needed to program the computers and I/O mechanisms, filling the role of a traditional "CPU manual".

F18A Computer

F18A I/O

F18A Data Book

Production Technology Reference

Computer Brief Last updated 4/12/2011.
I/O Brief Last updated 4/12/2011.
Data Book Last updated 4/12/2011.

Chips using F18A Technology

Read this section for configurations and other details, such as pin-outs, ROM content and electrical characteristics, of particular chips that use the technology described above. The complete manual for the G144 consists of two volumes: The F18A Datra Book and the G144A12 Data Book.

GA144-1.10 Brief